The 3-wire serial digital input is easily interfaced to micro-processors running at 10 MHz with minimal additional circuitry. Each DAC is addressed individually by a 16-bit serial word consisting of a 12-bit data word and an address header. The user-programmable reset control CLR forces all four DAC outputs to either zero scale or midscale, asynchronously overriding the current DAC register values. The output voltage range, determined by the inputs VREFHI and VREFLO, is set by the user for positive or negative unipolar or bipolar signal swings within the supplies, allowing considerable design flexibility.
The DAC8420 is available in 16-lead PDIP, SOIC, and CERDIP packages. Operation is specified with supplies ranging from +5 V only to ±15 V, with references of +2.5 V to ±10 V, respectively. Power dissipation when operating from ±15 V supplies is less than 255 mW (maximum) and only 35 mW (maximum) with a +5 V supply.