The fourth generation of SHARC Processors, now includes the low power floating point DSP products the ADSP-21478 and ADSP-21479 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals and new memory configurations capable of supporting a single chip solution. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats and their low power make them particularly suitable for battery powered applications or where a higher ambient operating temperature is required.
The ADSP-21478 offers a very low power and high performance 266MHz/1596 MFLOPs in a BGA and LQFP package within the fourth generation SHARC Processor family. This feature of power makes the ADSP-21478 particularly well suited to address the automotive audio and many industrial control segments where low power is a requirement. In addition to its high core performance, the ADSP-21478 includes additional processing blocks such as FIR, IIR and FFT accelerators to increase the total performance of the system. There is a new feature called variable instruction set architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs.
- 266MHz core clock speed
- 3Mbits of on-chip RAM
- FIR, IIR and FFT accelerators
- Watch dog timer
- Shift registers
- 2 SPI-compatible ports supporting master and slave modes
- UART and two-wire interface
- 16 pulse Width modulation (PWM) channels
- 3 full-featured timers