ADL5391 provides the same general mathematical function that has been field proven to provide an exceptional degree of versatility in function synthesis.
The most significant advance in the ADL5391 is the use of a new multiplier core architecture, which differs markedly from the conventional form that has been in use since 1970. The conventional structure that employs a current mode, translinear core, is fundamentally asymmetric with respect to the X and Y inputs, leading to relative amplitude and timing misalignments that are problematic at high frequencies. The new multiplier core eliminates these misalignments by offering symmetric signal paths for both X and Y inputs. The Z input allows a signal to be added directly to the output. This can be used to cancel a carrier or to apply a static offset voltage.
- Ultrafast symmetric multiplier
- Unique design ensures absolute XY-symmetry
- Identical X and Y amplitude/timing responses
- Adjustable gain scaling
- DC-coupled
- Fully differential inputs
- Low noise, high linearity
- Accurate temperature stable gain scaling
- Low current power-down mode
- Applications:
- Wideband multiplication and summing
- High frequency analog modulation
- Adaptive antennas
- Square-law detectors and true rms detectors
- DC capable VGA with fast control
